As the semiconductor industry has progressed into nanometer technology process nodes in pursuit of higher device density, higher performance, and lower costs, challenges from both fabrication and design have resulted in the development of three dimensional designs, such as fin-like field effect transistors (FinFETs). A typical FinFET is fabricated with a thin “fin” (or fin structure) extending from a substrate, for example, etched into a silicon layer of the substrate. A channel of the FET is formed in this vertical fin. A gate is typically provided on both sides of the channel allowing gate control of the channel from both sides. More recently, FinFET devices have been implemented as memory devices. Although existing FinFET memory devices and methods of fabricating FinFET memory devices have been generally adequate for their intended purposes, as device scaling down continues, they have not been entirely satisfactory in all respects.